From: Sergey Bronnikov via Tarantool-patches <tarantool-patches@dev.tarantool.org> To: Sergey Kaplun <skaplun@tarantool.org> Cc: tarantool-patches@dev.tarantool.org Subject: Re: [Tarantool-patches] [PATCH luajit 2/3] ARM64: More improvements to the generation of immediates. Date: Tue, 9 Sep 2025 11:30:39 +0300 [thread overview] Message-ID: <509b1323-b0b4-4858-9f93-ca913cdd1055@tarantool.org> (raw) In-Reply-To: <aK7LC0B61ECR2zdp@root> [-- Attachment #1: Type: text/plain, Size: 1999 bytes --] Hi, Sergey! On 8/27/25 12:08, Sergey Kaplun wrote: > Hi, Sergey! > Thanks for the review! > Please consider my answers below. > > On 25.08.25, Sergey Bronnikov wrote: >> Hi, Sergey! >> >> thanks for the patch! >> >> In general LGTM, I would suggest fixing the description in commit message. >> >> See below. >> >> Sergey >> >> On 7/24/25 12:03, Sergey Kaplun wrote: >>> From: Mike Pall <mike> >>> >>> (cherry picked from commit 69138082a3166105faa8cbb25fadb1e4298686c0) >>> >>> This patch refactors the emitting of immediates for the arm64 >>> architecture. The main changes are the following: >>> * Use `emit_getgl()`, `emit_setgl()` instead of `emit_lso()`, where it >>> is possible, since it makes the code cleaner. >>> * The `RID_GL` is allocated for `g` at the start of the trace emitting. >>> Also, this register is considered as a candidate to be used as a base >>> for the N-step offset in `emit_kdelta()`. >>> * The address of `tmptv` is not rematerialized to the register from the >>> constant not. It is calculated via the adding the corresponding > This "not" looks excessive. Rewritten as the following: > | * The address of `tmptv` is not rematerialized to the register from the > | constant. It is calculated via the adding the corresponding offset to > | `RID_GL`. > > >>> offset to `RID_GL`. >> it is not clear for me what for hunks with `emit_dm` are needed. > | emit_dm(as, ins, d, m); > Means emit the ins with values to the D and M instruction fields as > registers `d`, `m` respectively. > > In the case of this patch, it emits simply: > | mov rd, rm > Where `rd` is the register associated with `ASM_REF_TMP1` (`REF_TRUE`) > and `rm` is `RID_GL`. So this is simply moving the value of `g` from the > `RID_GL` register to the register, which will be an argument for the C > function call like `lj_gc_step_jit()`. Move is used instead of the > constant value loading. Thanks for explanation! I thought you will add it to the commit message. >> <snipped> [-- Attachment #2: Type: text/html, Size: 3107 bytes --]
next prev parent reply other threads:[~2025-09-09 8:30 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2025-07-24 9:03 [Tarantool-patches] [PATCH luajit 0/3] Generation of immediates and TBAR fusion Sergey Kaplun via Tarantool-patches 2025-07-24 9:03 ` [Tarantool-patches] [PATCH luajit 1/3] ARM64: Improve generation of immediates Sergey Kaplun via Tarantool-patches 2025-08-25 15:26 ` Sergey Bronnikov via Tarantool-patches 2025-07-24 9:03 ` [Tarantool-patches] [PATCH luajit 2/3] ARM64: More improvements to the " Sergey Kaplun via Tarantool-patches 2025-08-25 14:21 ` Sergey Bronnikov via Tarantool-patches 2025-08-27 9:08 ` Sergey Kaplun via Tarantool-patches 2025-09-09 8:30 ` Sergey Bronnikov via Tarantool-patches [this message] 2025-07-24 9:04 ` [Tarantool-patches] [PATCH luajit 3/3] ARM64: Prevent STP fusion for conditional code emitted by TBAR Sergey Kaplun via Tarantool-patches 2025-08-25 15:12 ` Sergey Bronnikov via Tarantool-patches 2025-08-08 14:28 ` [Tarantool-patches] [PATCH luajit 0/3] Generation of immediates and TBAR fusion Sergey Bronnikov via Tarantool-patches 2025-08-25 15:26 ` Sergey Bronnikov via Tarantool-patches
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