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From: Igor Munkin <imun@tarantool.org>
To: Sergey Ostanevich <sergos@tarantool.org>,
	Kirill Yukhin <kyukhin@tarantool.org>,
	Sergey Kaplun <skaplun@tarantool.org>
Cc: tarantool-patches@dev.tarantool.org
Subject: [Tarantool-patches] [PATCH] jit: fix cdatanum addressing for GC64 mode on x86
Date: Wed, 14 Oct 2020 16:53:54 +0300	[thread overview]
Message-ID: <ddae38988c08d7ca8586c17f891a80af1dd804b1.1602683107.git.imun@tarantool.org> (raw)

This patch fixes the regression introduced in scope of
5f6775ae0e141422193ad9b492806834064027ca ('core: introduce various
platform metrics'). As a result of the patch <cdatanum> displacement is
misencoded when GC64 mode is enabled.

In X86 long mode 32-bit displacement is encoded either via SIB byte or
is addressed relatively to RIP register value. The first approach is
used in JIT for 32-bit addresses (i.e. when GC64 mode is disabled), but
doesn't work for 64-bit ones. As a result all addresses to GG_State
contents to be "hardcoded" on the trace are encoded relatively to
RID_DISPATCH register (i.e. callee-safe R14 register) containing global
dispatch table. For this purpose this register is not used by the JIT
register allocator in GC64 build and not spoiled throughout LuaJIT VM
cycle (and therefore trace execution).

NB: Since R14 is the additional GRP, the <add> instruction ought to be
REX-prefixed.

Follows up tarantool/tarantool#5187

Reported-by: Vladislav Shpilevoy <v.shpilevoy@tarantool.org>
Signed-off-by: Igor Munkin <imun@tarantool.org>
---

Branch: https://github.com/tarantool/luajit/compare/imun/gh-5187-fix-disp-encoding-on-gc64

Unforunately, CI is red, but those failures relates to the known build
issues. Nevertheless I tested the patch manually on tntmac04 and faced
no failures.

 src/lj_asm_x86.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/lj_asm_x86.h b/src/lj_asm_x86.h
index 959fc2d..767bf6f 100644
--- a/src/lj_asm_x86.h
+++ b/src/lj_asm_x86.h
@@ -1837,8 +1837,13 @@ static void asm_cnew(ASMState *as, IRIns *ir)
 
   /* Increment cdatanum counter by address directly. */
   emit_i8(as, 1);
+#if LJ_GC64
+  emit_rmro(as, XO_ARITHi8, XOg_ADD|REX_64, RID_DISPATCH,
+	    dispofs(as, &J2G(as->J)->gc.cdatanum));
+#else
   emit_rmro(as, XO_ARITHi8, XOg_ADD, RID_NONE,
 	    ptr2addr(&J2G(as->J)->gc.cdatanum));
+#endif
   /* Combine initialization of marked, gct and ctypeid. */
   emit_movtomro(as, RID_ECX, RID_RET, offsetof(GCcdata, marked));
   emit_gri(as, XG_ARITHi(XOg_OR), RID_ECX,
-- 
2.25.0

             reply	other threads:[~2020-10-14 14:04 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-14 13:53 Igor Munkin [this message]
2020-10-14 18:18 ` Sergey Ostanevich
2020-10-14 18:31   ` Igor Munkin
2020-10-14 20:11     ` Sergey Ostanevich
2020-10-14 20:13       ` Igor Munkin
2020-10-14 19:04 ` Sergey Kaplun
2020-10-14 19:22   ` Igor Munkin
2020-10-15  8:41 ` Kirill Yukhin

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