From: sergos via Tarantool-patches <tarantool-patches@dev.tarantool.org>
To: Sergey Kaplun <skaplun@tarantool.org>
Cc: tarantool-patches@dev.tarantool.org
Subject: Re: [Tarantool-patches] [PATCH luajit] LJ_GC64: Make ASMREF_L references 64 bit.
Date: Wed, 3 May 2023 11:32:10 +0300 [thread overview]
Message-ID: <91DEE028-B10D-4B36-BBE2-FF18CE9AD514@tarantool.org> (raw)
In-Reply-To: <ZFDGHI7G8VbF5vS8@root>
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Hi!
Thanks for the patch!
Since test is x86_64 only - can we put an explicit skipcond then?
Otherwise LGTM.
Sergos.
> On 2 May 2023, at 11:13, Sergey Kaplun <skaplun@tarantool.org> wrote:
>
> Hi, Max!
> Thanks for the review!
>
> On 18.04.23, Maxim Kokryashkin wrote:
>>
>> Hi, Sergey!
>> Thanks for the patch!
>> LGTM, except for a few nits below and the single question.
>>>
>>>> From: Mike Pall <mike>
>>>>
>>>> Reported by Yichun Zhang.
>>>>
>>>> (cherry picked from commit 850f8c59d3d04a9847f21f32a6c36d8269b5b6b1)
>>>>
>>>> The `ASMREF_L` reference is defined as `REF_NIL`, so it isn't considered
>>>> as 64 bit address. On GC64 mode it may lead to the following assembly:
>>> Typo: s/as 64 bit/a 64-bit/
>
> Fixed, thanks!
>
>>>> | mov eax, edi
>>>> so, high 32 bits of the reference are lost.
>>> Typo: s/high/the high/
>>>>
>>>> This patch adds `IRT_NIL` to `IRT_IS64` mask, to consider `ASMREF_L`
>>>> 64 bit long. Now the resulting assembly is the following:
>>>> | mov rax, rdi
>
> Fixed, thanks!
>
> Branch is force-pushed.
>
>>>>
>>>> False-positive `if` condition in <src/lj_asm.c> is OK, since `op12`
>>>> already initialized as 0.
>>>>
>>>> False-positive `if` condition in <src/lj_opt_sink.c>, <src/lj_opt_split.c>,
>>>> <src/lj_record.c> is OK, since `REF_NIL` is the last reference before
>>>> `REF_BASE` and this iteration of a cycle is still the last one.
>>>>
>>>> Sergey Kaplun:
>>>> * added the description and the test for the problem
>>>>
>>>> Part of tarantool/tarantool#8516
>>>> ---
>>>>
>>>> Branch: https://github.com/tarantool/luajit/tree/skaplun/or-144-gc64-asmref-l
>>>> Related issues:
>>>> * https://github.com/openresty/lua-resty-core/issues/144
>>>> * https://github.com/tarantool/tarantool/issues/8516
>>>> PR: https://github.com/tarantool/tarantool/pull/8553
>>>> ML: https://www.freelists.org/post/luajit/Consistent-SEGV-on-x64-with-the-latest-LuaJIT-v21-GC64-mode
>>>>
>
> <snipped>
>
>>>> +local global_env
>>>> +local _
>>>> +for i = 1, 4 do
>>>> + -- Test `IR_LREF` assembling: using `ASMREF_L` (`REF_NIL`).
>>>> + global_env = getfenv(0)
>>>> + -- Need to reuse the register, to cause emitting of `mov`
>>>> + -- instruction (see `ra_left()` in <src/lj_asm.c>).
>>>> + _ = tostring(i)
>>>> +end
>>>> +
>>>> +test:ok(global_env == getfenv(0), 'IR_LREF assembling correctness')
>>>> +
>>>> +os.exit(test:check() and 0 or 1)
>>> Neither this test case, nor the original one from OpenResty fail before the patch on OSX/ARM64.
>>> Is it expected behavior or not?
>
> Yes, I think that non x86_64 arches are unaffected, since they use
> `ra_leftov()` instead.
>
>>> On x86 GC64 it behaves as expected though.
>>>> --
>>>> 2.34.1
>>> --
>>> Best regards,
>>> Maxim Kokryashkin
>>>
>
> --
> Best regards,
> Sergey Kaplun
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next prev parent reply other threads:[~2023-05-03 8:32 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-11 20:36 Sergey Kaplun via Tarantool-patches
2023-04-18 16:33 ` Maxim Kokryashkin via Tarantool-patches
2023-05-02 8:13 ` Sergey Kaplun via Tarantool-patches
2023-05-03 8:32 ` sergos via Tarantool-patches [this message]
2023-05-03 8:40 ` Sergey Kaplun via Tarantool-patches
2023-05-03 8:56 ` Maxim Kokryashkin via Tarantool-patches
2023-05-25 6:16 ` Igor Munkin via Tarantool-patches
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