From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from [87.239.111.99] (localhost [127.0.0.1]) by dev.tarantool.org (Postfix) with ESMTP id B74BE71220; Wed, 27 Oct 2021 16:04:17 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 dev.tarantool.org B74BE71220 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tarantool.org; s=dev; t=1635339858; bh=CEntsCiMQc9XFjMtDf9BC8o79JaXDmGtYgiEmqBSHrE=; h=To:Date:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=ijiXJYKor4pTEog6lrd68bPTUB7g9uYtCMAIUdwkM1ANnRDiWDcTG6J5jcJOFI8Gx mszAg4LFXRFRfAhVj2F55zd62QFcU+eKFJuUVd0UAWLoIEFslY7z2qyPpTlkLxOxfS tC6errYSrH5uzG0b75Uj5erKoCQf41OVPGneVykI= Received: from smtp16.mail.ru (smtp16.mail.ru [94.100.176.153]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dev.tarantool.org (Postfix) with ESMTPS id C716A71218 for ; Wed, 27 Oct 2021 16:04:10 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 dev.tarantool.org C716A71218 Received: by smtp16.mail.ru with esmtpa (envelope-from ) id 1mfibB-0001Ia-O4; Wed, 27 Oct 2021 16:04:10 +0300 To: Sergey Ostanevich , Igor Munkin Date: Wed, 27 Oct 2021 16:02:22 +0300 Message-Id: <20211027130222.15625-1-skaplun@tarantool.org> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-7564579A: 646B95376F6C166E X-77F55803: 4F1203BC0FB41BD9D1D35DBD2D15487E6FBC665C70D7247AB4BFB4F26BF422ED182A05F538085040D14F98E9970F9C580AC376940C74EE30AC6515A5EE4D5939FC2F70BE79D490B0 X-7FA49CB5: FF5795518A3D127A4AD6D5ED66289B5278DA827A17800CE737BB76880A4CA9A4EA1F7E6F0F101C67BD4B6F7A4D31EC0BCC500DACC3FED6E28638F802B75D45FF8AA50765F79006378D6424E594306CB78638F802B75D45FF36EB9D2243A4F8B5A6FCA7DBDB1FC311F39EFFDF887939037866D6147AF826D8A0CF2B0B091D015B7C4819A37A5C3504117882F4460429724CE54428C33FAD305F5C1EE8F4F765FC60CDF180582EB8FBA471835C12D1D9774AD6D5ED66289B52BA9C0B312567BB23117882F44604297287769387670735201E561CDFBCA1751FF04B652EEC242312D2E47CDBA5A96583BA9C0B312567BB231DD303D21008E29813377AFFFEAFD269A417C69337E82CC2E827F84554CEF50127C277FBC8AE2E8BA83251EDC214901ED5E8D9A59859A8B67393CE827C55B5F775ECD9A6C639B01B4E70A05D1297E1BBCB5012B2E24CD356 X-C1DE0DAB: C20DE7B7AB408E4181F030C43753B8186998911F362727C414F749A5E30D975C2749EEF4D85F8CCA89E78CA3A7F816B046341AF33C79A9999C2B6934AE262D3EE7EAB7254005DCEDC2E38EA5364207DE1E0A4E2319210D9B64D260DF9561598F01A9E91200F654B068F972559010CA1C8E8E86DC7131B365E7726E8460B7C23C X-C8649E89: 4E36BF7865823D7055A7F0CF078B5EC49A30900B95165D34697E0FA301E2821555DE4D423FE34F4EAEE22967C0009A2229C2FE5BE31298FC78C81F0D00059C141D7E09C32AA3244C6C49F10D25C80ACA22BFAE2205BE1F737101BF96129E4011927AC6DF5659F194 X-D57D3AED: 3ZO7eAau8CL7WIMRKs4sN3D3tLDjz0dLbV79QFUyzQ2Ujvy7cMT6pYYqY16iZVKkSc3dCLJ7zSJH7+u4VD18S7Vl4ZUrpaVfd2+vE6kuoey4m4VkSEu530nj6fImhcD4MUrOEAnl0W826KZ9Q+tr5ycPtXkTV4k65bRjmOUUP8cvGozZ33TWg5HZplvhhXbhDGzqmQDTd6OAevLeAnq3Ra9uf7zvY2zzsIhlcp/Y7m53TZgf2aB4JOg4gkr2biojOHwMx23X6B3zKDn2mRRVdA== X-Mailru-Sender: 3B9A0136629DC91206CBC582EFEF4CB4A6AEAB4DD86F72AA8E4635DA1E94B2D7C0250AA50F37166EF2400F607609286E924004A7DEC283833C7120B22964430C52B393F8C72A41A89437F6177E88F7363CDA0F3B3F5B9367 X-Mras: Ok Subject: [Tarantool-patches] [PATCH luajit] ARM64: Fix assembly of HREFK. X-BeenThere: tarantool-patches@dev.tarantool.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Tarantool development patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Sergey Kaplun via Tarantool-patches Reply-To: Sergey Kaplun Cc: tarantool-patches@dev.tarantool.org Errors-To: tarantool-patches-bounces@dev.tarantool.org Sender: "Tarantool-patches" From: Mike Pall Reported by Jason Teplitz. (cherry picked from commit 06cd9fce7df440323647174f1ca4a01281ec8acd) LDR instruction with register offset [1] has a restriction, that the destination register must be different from the register used for offset base. HREFK IR emits LDR instruction for a load of node key to a register. Base register to offset contains a node address. The register holding the node address is not excluded from a allow set, when loading the key value to a new register, and may be chosen by the register allocator as a destination for the key value, which violates the aforementioned restriction. This patch excludes the node register from the allowing set in the allocation of register for a key value. Sergey Kaplun: * added the description and the test for the problem [1]: https://developer.arm.com/documentation/dui0489/c/arm-and-thumb-instructions/memory-access-instructions/ldr-and-str--register-offset- Part of tarantool/tarantool#6548 --- Branch: https://github.com/tarantool/luajit/tree/skaplun/lj-357-arm64-hrefk Tarantool branch: https://github.com/tarantool/tarantool/tree/skaplun/lj-357-arm64-hrefk LuaJIT issue: https://github.com/LuaJIT/LuaJIT/issues/357 Issue: https://github.com/tarantool/tarantool/issues/6548 src/lj_asm_arm64.h | 11 ++++---- .../lj-357-arm64-hrefk.test.lua | 27 +++++++++++++++++++ 2 files changed, 32 insertions(+), 6 deletions(-) create mode 100644 test/tarantool-tests/lj-357-arm64-hrefk.test.lua diff --git a/src/lj_asm_arm64.h b/src/lj_asm_arm64.h index cc8c0c9d..da0ee4bb 100644 --- a/src/lj_asm_arm64.h +++ b/src/lj_asm_arm64.h @@ -869,14 +869,12 @@ static void asm_hrefk(ASMState *as, IRIns *ir) int32_t ofs = (int32_t)(kslot->op2 * sizeof(Node)); int32_t kofs = ofs + (int32_t)offsetof(Node, key); int bigofs = !emit_checkofs(A64I_LDRx, ofs); - RegSet allow = RSET_GPR; Reg dest = (ra_used(ir) || bigofs) ? ra_dest(as, ir, RSET_GPR) : RID_NONE; - Reg node = ra_alloc1(as, ir->op1, allow); - Reg key = ra_scratch(as, rset_clear(allow, node)); - Reg idx = node; + Reg node = ra_alloc1(as, ir->op1, RSET_GPR); + Reg key, idx = node; + RegSet allow = rset_exclude(RSET_GPR, node); uint64_t k; lua_assert(ofs % sizeof(Node) == 0); - rset_clear(allow, key); if (bigofs) { idx = dest; rset_clear(allow, dest); @@ -892,7 +890,8 @@ static void asm_hrefk(ASMState *as, IRIns *ir) } else { k = ((uint64_t)irt_toitype(irkey->t) << 47) | (uint64_t)ir_kgc(irkey); } - emit_nm(as, A64I_CMPx, key, ra_allock(as, k, allow)); + key = ra_scratch(as, allow); + emit_nm(as, A64I_CMPx, key, ra_allock(as, k, rset_exclude(allow, key))); emit_lso(as, A64I_LDRx, key, idx, kofs); if (bigofs) emit_opk(as, A64I_ADDx, dest, node, ofs, RSET_GPR); diff --git a/test/tarantool-tests/lj-357-arm64-hrefk.test.lua b/test/tarantool-tests/lj-357-arm64-hrefk.test.lua new file mode 100644 index 00000000..200d29f0 --- /dev/null +++ b/test/tarantool-tests/lj-357-arm64-hrefk.test.lua @@ -0,0 +1,27 @@ +local tap = require('tap') + +-- Test file to demonstrate the incorrect JIT behaviour for HREFK +-- IR compilation on arm64. +-- See also https://github.com/LuaJIT/LuaJIT/issues/357. +local test = tap.test('lj-357-arm64-hrefk') +test:plan(2) + +jit.opt.start('hotloop=1', 'hotexit=1') + +local t = {hrefk = 0} + +-- XXX: Need to generate a bunch of side traces (starts a new one +-- when the hmask is changed) to wait, when the register allocator +-- chooses the same register as a base register for offset and +-- destination in LDR instruction. +local START = 2e3 +local STOP = 1 +for i = START, STOP, -1 do + t.hrefk = t.hrefk - 1 + t[t.hrefk] = i +end + +test:is(t.hrefk, -START) +test:is(t[t.hrefk], STOP) + +os.exit(test:check() and 0 or 1) -- 2.31.0