From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtpng1.m.smailru.net (smtpng1.m.smailru.net [94.100.181.251]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dev.tarantool.org (Postfix) with ESMTPS id 38ED9469719 for ; Thu, 8 Oct 2020 12:39:15 +0300 (MSK) Date: Thu, 8 Oct 2020 12:28:38 +0300 From: Igor Munkin Message-ID: <20201008092838.GS18920@tarantool.org> References: <2280bc3a2e32356455c3aebae711bafe2c4332f5.1601878708.git.skaplun@tarantool.org> <20201007141106.GP18920@tarantool.org> <20201007195558.GA20188@root> <20201007201601.GR18920@tarantool.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20201007201601.GR18920@tarantool.org> Subject: Re: [Tarantool-patches] [PATCH v4 1/2] core: introduce various platform metrics List-Id: Tarantool development patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Kaplun Cc: tarantool-patches@dev.tarantool.org Sergey, On 07.10.20, Igor Munkin wrote: > Sergey, > > Thanks for your fixes! There is still a comment regarding CNEW > assembling and a couple minors below. > > > > diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h > > index f4b4b5d..0341701 100644 > > --- a/src/lj_asm_mips.h > > +++ b/src/lj_asm_mips.h > > @@ -1430,7 +1430,9 @@ static void asm_cnew(ASMState *as, IRIns *ir) > > CTInfo info = lj_ctype_info(cts, id, &sz); > > const CCallInfo *ci = &lj_ir_callinfo[IRCALL_lj_mem_newgco]; > > IRRef args[4]; > > + RegSet allow = (RSET_GPR & ~RSET_SCRATCH); > > RegSet drop = RSET_SCRATCH; > > + Reg tmp; > > lua_assert(sz != CTSIZE_INVALID || (ir->o == IR_CNEW && ir->op2 != REF_NIL)); > > > > as->gcsteps++; > > @@ -1442,7 +1444,6 @@ static void asm_cnew(ASMState *as, IRIns *ir) > > > > /* Initialize immutable cdata object. */ > if (ir->o == IR_CNEWI) { > > - RegSet allow = (RSET_GPR & ~RSET_SCRATCH); > > #if LJ_32 > > int32_t ofs = sizeof(GCcdata); > > if (sz == 8) { > > @@ -1473,15 +1474,16 @@ static void asm_cnew(ASMState *as, IRIns *ir) > > return; > > } > > > > + tmp = ra_scratch(as, allow); > > Since there are registers allocated in scope of IR_CNEWI assembling > above, you need to exclude those registers from set prior to > scratching a new one. I glanced once more: the register to be yielded is picked from the intersection between the not used set and allowed set (which is quite obvious), so there is no problem. Disregard the comment above. > > > /* Code incrementing cdatanum is sparse to avoid mips data hazards. */ -- Best regards, IM