[Tarantool-patches] [PATCH luajit 2/2] Fix base register coalescing in side trace.

[Igor Munkin]

Sergey,

Thanks for the patch! LGTM, except a typo below.

On 11.10.23, Sergey Kaplun via Tarantool-patches wrote:
> From: Mike Pall <mike>
> 
> Thanks to Sergey Kaplun, NiLuJe and Peter Cawley.
> 
> (cherry-picked from commit aa2db7ebd1267836af5221336ccb4e9b4aa8372d)
> 
> The previous patch fixed just part of the problem with the register
> coalesing. For example, the parent base register may be used inside the

Typo: s/coalesing/coalescing.

> parent or child register sets when it shouldn't. This leads to incorrect
> register allocations, which may lead to crashes or undefined behaviour.
> This patch fixes it by excluding the parent base register from both
> register sets.
> 
> The test case for this patch doesn't fail before the commit since it
> requires specific register allocation, which is hard to construct and
> very fragile. Due to the lack of ideal sync with the upstream
> repository, the test is passed before the patch.
> It should become correct in future patches.
> 
> Resolves tarantool/tarantool#8767
> Part of tarantool/tarantool#9145
> 
> Sergey Kaplun:
> * added the description and the test for the problem
> ---
>  src/lj_asm.c                                  |   7 +-
>  src/lj_asm_arm.h                              |   7 +-
>  src/lj_asm_arm64.h                            |   7 +-
>  src/lj_asm_mips.h                             |   8 +-
>  src/lj_asm_ppc.h                              |   8 +-
>  src/lj_asm_x86.h                              |   8 +-
>  .../lj-1031-asm-head-side-base-reg.test.lua   | 139 ++++++++++++++++++
>  7 files changed, 163 insertions(+), 21 deletions(-)
>  create mode 100644 test/tarantool-tests/lj-1031-asm-head-side-base-reg.test.lua
> 

<snipped>

> -- 
> 2.42.0
> 

-- 
Best regards,
IM