[Tarantool-patches] [PATCH] jit: fix cdatanum addressing for GC64 mode on x86

[Igor Munkin]

Sergey,

Thanks for your review!

On 14.10.20, Sergey Kaplun wrote:
> Hi!
> 
> Thanks for the patch!
> I have only one nitpick/question regarding to commit message.
> 
> Otherwise, LGTM.

Added your tag:
| Reviewed-by: Sergey Kaplun <skaplun at tarantool.org>

> 
> On 14.10.20, Igor Munkin wrote:
> > This patch fixes the regression introduced in scope of
> > 5f6775ae0e141422193ad9b492806834064027ca ('core: introduce various
> > platform metrics'). As a result of the patch <cdatanum> displacement is
> > misencoded when GC64 mode is enabled.
> > 
> > In X86 long mode 32-bit displacement is encoded either via SIB byte or
> > is addressed relatively to RIP register value. The first approach is
> > used in JIT for 32-bit addresses (i.e. when GC64 mode is disabled), but
> > doesn't work for 64-bit ones. As a result all addresses to GG_State
> > contents to be "hardcoded" on the trace are encoded relatively to
> > RID_DISPATCH register (i.e. callee-safe R14 register) containing global
> > dispatch table. For this purpose this register is not used by the JIT
> > register allocator in GC64 build and not spoiled throughout LuaJIT VM
> > cycle (and therefore trace execution).
> > 
> > NB: Since R14 is the additional GRP, the <add> instruction ought to be
> > REX-prefixed.
> 
> Nit: Also REX prefix is needed to specify 64-bit operand size, isn't
> it?

Nice catch! Totally missed W-bit. Adjusted this line the following way:
| NB: Since R14 is the additional GRP and default <add> operand size is
| 32-bit (but 64-bit is used), the instruction ought to be REX-prefixed.

> 
> > 
> > Follows up tarantool/tarantool#5187
> > 
> > Reported-by: Vladislav Shpilevoy <v.shpilevoy at tarantool.org>
> > Signed-off-by: Igor Munkin <imun at tarantool.org>
> > ---
> > 
> > Branch: https://github.com/tarantool/luajit/compare/imun/gh-5187-fix-disp-encoding-on-gc64
> > 

<snipped>

> 
> -- 
> Best regards,
> Sergey Kaplun

-- 
Best regards,
IM